CVE-2026-0455

An AI Edge processor could access another interrupt channel’s message buffers

AMD · Versal AI Edge Series Gen 2 adaptive SoCs

First documented disclosure · Review checkpoint

Summary

The on-chip protection unit reported an access violation without blocking the associated transaction. It could read or modify other channels’ buffered messages or no-buffer control registers.

Severity and exploitation evidence

Medium · 5.9/10 · CVSS 4.0. Severity source.

Exploitation not established: The reviewed advisory does not report malicious exploitation.

Exploitation evidence source

Technical severity is not a measure of observed attacks or of risk to your deployment. Attempts, demonstrations, and successful compromise retain the qualifications in the source.

How the weakness works

The on-chip protection unit reported an access violation without blocking the associated transaction.

Conditions required

A processor on an affected chip already had access to an inter-processor interrupt channel.

Potential impact

It could read or modify other channels’ buffered messages or no-buffer control registers.

Affected versions and configurations

Versal AI Edge Series Gen 2. The CNA also lists Versal Prime Series Gen 2 parts 2VM3358, 2VM3558 and 2VM3858, and the AI Edge Vivado Advanced Configuration Editor.

Fix and mitigation status

AMD identifies a 2026.1 software mitigation released June 23, 2026.

Practical next steps

Apply the 2026.1 mitigation and retain AMD’s default soft-reset response for a violating processor.

Operating lesson

Review inter-processor access policy when isolation depends on a hardware violation response.

Evidence and limits

AMD describes a silicon timing issue and a software mitigation. Its security bulletin was published November 10. The CVE record was published on 2026-11-12.

Sources